专利摘要:
The invention describes a device (1) comprising: a first circuit (2) generating transient pulses having an input (2e) and an output (2s); a second circuit (3) transient pulse generator, identical to the first except for the inherent differences in the manufacturing process, which has an input (3e) and an output (3s); a circuit (4) referee that has first and second entries (4e1, 4e2) connected to the exit (2s) and to the exit (3s), and an exit (4s) of referee circuit, where the circuit (4) referee is configured to determine if an input signal "question" entered simultaneously in the input (2e) and in the input (3e) arrives before as a pulse to the output (2s) or to the output (3s) and to emit an output pulse depending on it through the exit (4s) of the referee circuit. (Machine-translation by Google Translate, not legally binding)
公开号:ES2684846A1
申请号:ES201730535
申请日:2017-03-31
公开日:2018-10-04
发明作者:Luis Alfonso ENTRENA ARRONTES;Honorio MARTÍN GONZÁLEZ;Enrique SAN MILLÁN HEREDIA
申请人:Universidad Carlos III de Madrid;
IPC主号:
专利说明:

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权利要求:
Claims (1)
[1]
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同族专利:
公开号 | 公开日
ES2684846B1|2019-05-10|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
US20030204743A1|2002-04-16|2003-10-30|Srinivas Devadas|Authentication of integrated circuits|
EP2665225A1|2011-01-13|2013-11-20|Mitsubishi Electric Corporation|Bit generation device and bit generation method|
US20140041040A1|2012-08-01|2014-02-06|The Regents Of The University Of California|Creating secure multiparty communication primitives using transistor delay quantization in public physically unclonable functions|
US20140327468A1|2013-05-03|2014-11-06|International Business Machines Corporation|Physical unclonable function generation and management|
CN106470024A|2015-08-18|2017-03-01|飞思卡尔半导体公司|Glitch-free clock switch circuit using Muller C-element|
法律状态:
2018-10-04| BA2A| Patent application published|Ref document number: 2684846 Country of ref document: ES Kind code of ref document: A1 Effective date: 20181004 |
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优先权:
申请号 | 申请日 | 专利标题
ES201730535A|ES2684846B1|2017-03-31|2017-03-31|Device and procedure for the univocal identification of an integrated circuit|ES201730535A| ES2684846B1|2017-03-31|2017-03-31|Device and procedure for the univocal identification of an integrated circuit|
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